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TU Berlin

Inhalt des Dokuments

Journal Articles

2018

C. Schmidt and C. Kottke and R. Freund and F. Gerfers and V. Jungnickel (2018). Digital-to-analog converters for high-speed optical communications using frequency interleaving: impairments and characteristics. Optics Express, 6758-6770.


C. Schmidt and C. Kottke and V. Tanzil and R. Freund and V. Jungnickel and F. Gerfers (2018). Digital-to-Analog Converters Using Frequency Interleaving: Mathematical Framework and Experimental Verification. Circuits, Systems and Signal Processing, 1-26.


2017

S. Lehmann and F. Gerfers (2017). Channel Analysis for a 6.4 Gb/s DDR5 Data Buffer Receiver Front-End. Advances in Radio Science, 157-161.


M. Schleyer and D. Maurath and H. Klar and F. Gerfers (2017). Advanced design and characterization methodologies for memory-aware CMOS power-amplifier implementation. Advances in Radio Science, 49-54.


2014

M. Schleyer and S. Leuschner, P. Baumgartner, J.-E. Müller and H. Klar (2014). An Enhanced BSIM Modeling Framework for Selfheating Aware Circuit Design. Advances in Radio Science


2012

F. Gerfers and R. Farjad and M. Brown et al. (2012). A 48-Port FCC-Compliant 10GBASE-T Transmitter With Mixed-Mode Adaptive Echo Canceller. IEEE Journal of Solid-State Circuits, Invited Paper for Special Issue, 3261-3272.


2008

F. Gerfers and P. Petkov and A. Köllmann and J. Conder and G. den Besten (2008). A 0.2-2Gbps 6xOSR Receiver using a Digitally Self-Adaptive Equalizer. IEEE Journal of Solid-State Circuits, July 2008, 1436-1448.


2007

M. Keller and A. Buhmann and M. Ortmanns and F. Gerfers and Y. Manoli (2007). On the Implicit Anti-Aliasing Feature of Continuous-Time Cascaded Sigma-Delta Modulators. IEEE Transactions on Circuits and Systems I, June 2007, 2639-2645.


2006

Y. Yin and H. Klar (2006). Wideband SC-Sigma-Delta Modulator Topology with Relaxed Requirement on the Integrator Settling Behaviour. WSEAS Transactions on Circuits and Systems, 499-504.


2005

M. Ortmanns and F. Gerfers and Y. Manoli (2005). A Case Study on a 2-1-1 Cascaded Continuous-Time Sigma-Delta Modulator. IEEE Transactions on Circuits and Systems I, Aug. 2005, 1515-1525.


M. Ortmanns and F. Gerfers and Y. Manoli (2005). A Continuous-Time Sigma-Delta Modulator with Reduced Sensitivity to Clock Jitter through SCR Feedback. IEEE Transactions on Circuits and Systems I, MAY 2005, 875-884.


2004

M. Ortmanns and F. Gerfers and Y. Manoli (2004). Compensation of Finite Gain-Bandwidth induced Errors in Continuous-Time Sigma-Delta Modulators. IEEE Transactions on Circuits and Systems I, Juni 2004, 875-884.


2003

F. Gerfers and M. Ortmanns and Y. Manoli (2003). A 1.5V, 12-Bit Power Efficient Continuous-Time Third Order Sigma-Delta Modulator. IEEE Journal of Solid-State Circuits, Aug. 2003, 875-884.


N. Mehrtash and D. Jung and H.H. Hellmich and T. Schoenauer and V.T. Lu and H. Klar (2003). Synaptic Plasticity in Spiking Neural Networks (SP2INN): A System Appoach. IEEE Transactions on Neural Networks, 980-992.


1992

D. Reuver and H. Klar (1992). A configurable convolution chip with programmable coefficients. IEEE Journal of Solid-State Circuits, 1121-1123.


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Head of Chair

Prof. Friedel Gerfers

Phone: +49 30 314-78181
Fax: +49 30 314-24597
Room: EN 423

E-Mail

Secretary's office

Sara Tennstedt
Phone: +49 30 314-78180
Fax: +49 30 314-24597
Room: EN 417

Postal Address

Technische Universität Berlin
FG Mixed Signal Circuit Design
Sekr. EN 4
Einsteinufer 17

10587 Berlin
Germany