TU Berlin

Mixed Signal Circuit DesignJulius Edler

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Julius Edler, M.Sc.

Lupe

Research Assistant

Contact
Room: EN420
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Research Interests

  • Ultra linear Data Converters enabling next generation data communication
  • High-Speed Delta-Sigma Converters
  • High-Linearity OTA Design Techniques

Thesis Offerings

  • Contact me for BA/MA thesis openings
  • Fields: IC Design and characterization of individual building blocks (ADCs, DACs, active filters,  digital logic) using cadence virtuoso and/or System design employing matlab, maple etc.

Vita
Julius Edler received the B.Eng. degree from Beuth University and the M.Sc. degree in electrical engineering from TU Berlin. During his studies he gained research experience at Fraunhofer HHI and Leibniz Institute IHP as a student research assistant. Subsequently, he joined the Mixed Signal Circuit Design (MSC) chair in an endeavor to pursue the Ph.D. degree. His research is focused on high-speed high-performance sigma-delta converters. He joined the chair of mixed-signal circuit design in spring 2020.

P.J. Artz and J. Edler and E. Wittenhagen and N. Lotfi and F. Gerfers (2022). Workshop WM02 talk: High-Speed ADC (>20 GS/s) with High Resolution (≥10 bit) for Low-IF Receiver in 22nm FDSOI. IEEE European Microwave Week (EuMW) 2021


J. Edler and P.J. Artz and F. Gerfers (2022). Workshop WM02 talk: mm-Wave Advanced-Sampling Transceiver Enabling 6G Data Transmission with 100 Gbit/s per mobile User. IEEE European Microwave Week (EuMW) 2021


M. Runge and J. Edler and T. Kaiser and F. Gerfers (2021). A 18MS/s 76dB SNDR 93dB SFDR CT ΔΣ Modulator with Input Voltage Tracking 2nd-Order GmVC Filter and Shared FIR DAC in 22nm FDSOI CMOS. IEEE Custom Integrated Circuits Conference 2021. IEEE.


J. Edler and M. Runge and F. Gerfers (2021). A Dynamic Body-Bias Linearization Technique Enabling Wide-Band GmC based Continous-Time Sigma-Delta Converters in 22 nm FD-SOI CMOS. IEEE International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 1090-1093.


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